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data sheet 01.94 ics for communications quadrature phase modulator pmb 2205
data classification maximum ratings maximum ratings are absolute ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit. characteristics the listed characteristics are ensured over the operating range of the integrated circuit. typical characteristics specify mean values expected over the production spread. if not otherwise specified, typical characteristics apply at t a = 25 c and the given supply voltage. operating range in the operating range the functions given in the circuit description are fulfilled. for detailed technical information about processing guidelines and quality assurance for ics, see our product overview . pmb 2205 revision history: 01.94 previous releases: 04.92 / 07.92 page update published by siemens ag, bereich halbleiter, marketing-kommunikation, balanstra?e 73, d-81541 mnchen. ? siemens ag 1994. all rights reserved. as far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies. the information describes the type of component and shall not be considered as assured characteristics. terms of delivery and rights to change design reserved. for questions on technology, delivery and prices please contact the semiconductor group offices in ger- many or the siemens companies and representatives worldwide (see address list). due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest siemens office, semiconductor group. siemens ag is an approved cecc manufacturer. packing please use the recycling operators known to you. we can also help you - get in touch with your nearest sales office. by agreement we will take packing material back, if it is sorted. you must bear the costs of transport. for packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred. edition 01.94 this edition was realized using the software system framemaker a .
type version ordering code package pmb 2205t v1.1 q67000-a6048 p-dso-20-1 (smd) pmb 2205s v1.1 q67000-a6066 p-dso-20-4 (smd shrink) pmb 2205t v1.2 q67000-a6083 p-dso-20-1 (smd) pmb 2205s v1.2 q67000-a6084 p-dso-20-4 (smd shrink) quadrature phase modulator preliminary data bipolar ic pmb 2205 p-dso-20-1 p-dso-20-4 features l double-balanced mixers l direct modulation l linear modulating inputs l symmetrical circuitry l generation of orthogonal carriers within a wide frequency range l lo operation alternatively at transmit frequency ( f 0 ) or double transmit frequency (2 f 0 ) l output of frequency doubler may be filtered by external tank circuit l 35 db carrier rejection, 40 db ssb rejection l 42 db rejection of third order products at normal drive level l 38 db rejection of doubled rf output frequency l 0 dbm linear output power l power on/off switch, low standby current l lo frequency range 120 mhz to 800 mhz at lo, lo input l double transmit frequency range 80 mhz to 900 mhz at pp/ pp input l modulation frequency range 0 to 400 mhz l p-dso-20-1; p-dso-20-4 package l temperature range - 25 c to 85 c semiconductor group 1 01.94 for new designs v1.2 has to be used.
pmb 2205 semiconductor group 2 applications l digital mobile radio and wlan l pcn & gsm-systems l continuous phase modulation, e.g. gmsk l various kinds of qpsk modulation and linear qam l frequency fine tuning l image reject up and down mixer the phase y ( t ) C w m t of rf-carriers in the range 120 to 800 mhz is modulated by external signals i( t ) = k 2 sin w m t and q( t ) = C k 2 cos w m t . the circuit is to be incorporated into a transmitter for mobile telephones conforming to the pcn/gsm standards. x( t )= k 1 sin y( t ) x k 2 sin w m t + k 1 cos y ( t ) x k 2 cos w m t = k 1 k 2 cos ( y ( t ) C w m t ) ? lower sideband realization to eq.(8) in gsm rec. 05. 04. feb. 88 the actual internal generated orthogonal lo carriers work in switching mode.
pmb 2205 semiconductor group 3 pin configuration (top view)
pmb 2205 semiconductor group 4 pin definitions and functions pin no. symbol function 1 en enable, power on/off switch 2 gnd ground 3 v s supply voltage 4 v s supply voltage, connected to pin 3 5 lo local oscillator frequency input, inverted 6 lo local oscillator frequency input 7 v s supply voltage, connected to pin 3 8 pp tank circuit or double transmit frequency input, inverted 9 pp tank circuit or double transmit frequency input 10 i modulating input i, open base 11 i inverted modulating input i, open base 12 q inverted modulating input q, open base 13 q modulating input q, open base 14 v s supply voltage, connected to pin 3 15 e rf output, open collector 16 e inverted rf output, open collector 17 v s supply voltage, connected to pin 3 18 po output emitter source resistor of output stage, to be connected to gnd direct or via a resistor to program emitter current 19 gnd ground, connected to pin 2 20 v si test output of internal bias voltage
pmb 2205 semiconductor group 5 block diagram
pmb 2205 semiconductor group 6 circuit description the transmission frequency f 0 at the differential inputs lo, lo is first doubled and then bandpass filtered at 2 f 0 . the filter may be realized by an external tank circuit at pp, pp providing a high suppression at higher harmonics than 2 f 0 . alternatively, a local oscillator operating at 2 f 0 may be connected to pp, pp while lo, lo is rf grounded. this frequency is the clock for a 2:1 divider. at the outputs of the two latches of this divider orthogonal carriers loi and loq for the modulator are provided. the modulator consists of two gilbert multipliers which are operated in switching mode by loi and loq respectively. furthermore these multipliers are driven with high linearity by the modulating signals i ( t ) and q ( t ) up to 1.5 vpp. the output signals of both gilbert cells are combined at the addition points. the sum drives a linear output stage. an internal current source resistor of the output stage is fed to po. this pad should be connected to gnd when minimal nonlinear distortion and maximum output power is desired. alternatively a resistor can be inserted, e.g. 30 w, in order to reduce the output current by half. the pin v si is used for dc-testing. a power-down switch en reduces the current consumption from approximately 40 ma in the active mode to less than 10 m a in the standby mode.
pmb 2205 semiconductor group 7 electrical characteristics absolute maximum ratings t a = - 25 to 85 c parameter symbol limit values unit min. max. supply voltage v s - 0.5 7 v differential input voltage (any differential input) v diff - 33 v output voltage at e and e v out v s - 1.6 7 v junction temperature t j 125 c storage temperature t stg C 55 125 c thermal resistance p-dso-20-1 r thja 90 k/w thermal resistance p-dso-20-4 r thja 143 k/w operational range within the operational range the ic operates as described in the circuit description. the ac/dc characteristic limits are not guaranteed supply voltage v s 4.4 5.8 v ambient temperature t a - 25 85 c transmit frequency range at lo/ lo f lo/ lo 120 800 mhz transmit frequency input level referred to 50 w p lo/ lo C 12 0 dbm double transmit frequency range at pp/ pp f pp/ pp 80 900 mhz double transmit frequency input level p pp/ pp see input sensitivity diagram figure 3 the pins e, e, pp and pp have no additional internal esd protection circuitry
pmb 2205 semiconductor group 8 ac/dc characteristics v s = 5.0 v; t a =25 c; p lo = C 15 dbm (referred to test circuit) parameter symbol limit values unit test condition min. typ. max. supply current normal operation i e + i e 11.5 14.5 18 ma en = h normal operation i s 23 27.5 33 ma en = h powered down i s 0.15 10 m a en = l transmit frequency input lo/ lo internal dc voltage at the input bases v dclo v dc lo 3.3 3.6 3.8 v v s = 5 v differential ac input impedance at 400 mhz * r lo/ lo 1.8 k w input capacitance parallel to r lo/ lo at 400 mhz * c lo/ lo 0.8 pf double transmit frequency input pp/ pp internal dc voltage at the input bases v dcpp v dc pp 3.6 v v s = 5 v differential ac input impedance at 800 mhz * r pp/ pp 190 w input capacitance parallel to r pp/ pp at 800 mhz c pp/ pp 1.8 pf * design hint
pmb 2205 semiconductor group 9 modulation inputs i to i and q to q input bias current of the open bases at i, i, q, q ** i b 468 m a external dc reference at i, i and q, q v ref 2.1 2.1 2.6 3.2 v v v s = 4.5 v v s = 5.5 v differential input swing for linear output power * v i, q 1.0 vpp differential input swing for 3 db compression v i, q 1.9 vpp external differential input offset voltage at i, i and q, q * v offset 10 mv for 35 db carrier suppression, see figure 1 external amplitude imbalance of i, q modulation signals * v i / v q 0.15 db for single sideband suppression 340db, see figure 2 phase error of i, q modulation signals * dj i, q 1 deg for single sideband suppression 340db differential input impedance at the ports i, i; q, q: 1 pf parallel r i r i 140 k w f = 100 khz i, q baseband input frequency range: 0 hz up to the 3 db point * f 400 mhz * design hint ** to avoid offset voltages, the base input should have identical bias ac/dc characteristics (contd) v s = 5.0 v; t a =25 c; p lo = C 15 dbm (referred to test circuit) parameter symbol limit values unit test condition min. typ. max.
pmb 2205 semiconductor group 10 output e/ e (open collectors) output power at 3 db compression * p out 6 dbm v i, q = 1.9 vpp linear output power at 200 w load, low spurious p out C 2 1 4 dbm v i, q = 1 vpp see test circuit rejection of third order products 42 db v i, q = 1 vpp carrier suppression see figure 1 a c 32 35 db v i, q = 1 vpp no external offset voltage single sideband suppression ** a ssb 40 42 db see test circuit residual am 2 % see figure 2 power on/off switching input voltage at en active powered down v en v en 4.2 0 v s 0.8 v v en = h en = l input current at en i en 30 80 0.1 m a m a en = h en = l power up/down time t s 1.0 m s en = h ? l * design hint for matched output ** 90 phase shift between i and q ac/dc characteristics (contd) v s = 5.0 v; t a =25 c; p lo = C 15 dbm (referred to test circuit) parameter symbol limit values unit test condition min. typ. max.
pmb 2205 semiconductor group 11 test circuit rf test circuit for ssb sine modulation test and for applications as image reject up mixer
pmb 2205 semiconductor group 12 typical application circuit
pmb 2205 semiconductor group 13 figure 1 carrier suppression a c versus offset at q, q figure 2 single sideband a ssb and residual am versus i/q amplitude imbalance
pmb 2205 semiconductor group 14 figure 3 input level at pp, pp versus double transmit frequency f pp/ pp
pmb 2205 semiconductor group 15 figure 4 pmb 2205 C input/output circuitry
pmb 2205 semiconductor group 16 plastic package, p-dso-20-1 (smd) (plastic dual small outline) plastic package, p-dso-20-4 (smd) (plastic dual small outline) sorts of packing package outlines for tubes, trays etc. are contained in our data book package information dimensions in mm smd = surface mounted device

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